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sheersh
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Joined: 24 May 2008
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| Please help me understanding difference between Jump and Branch instruction....like JNE & BNE |
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CICS Guy
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| The branch needs a base register and a displacement to describe the to address. The newer jump only needs the (relative to the jump instruction) displacement for the destination address. |
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dbzTHEdinosauer
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does the jump automatically store the address of the instruction after the jump in an special register?
NCR assembler (NEATVS - probably called something else now) has a jump instruction and it stores a return address in reg??. to return, you BR on the register. like a link within a program. |
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CICS Guy
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sheersh
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| Thanks for the reply.....One more thing....I noticed BRAS and Jump has same OPCODE (A7, if I remember correctly)......why??? |
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CICS Guy
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| sheersh wrote: |
| One more thing....I noticed BRAS and Jump has same OPCODE (A7, if I remember correctly)......why??? |
Jump is not the 'real' instruction, it is a (I forget the term) substituted name for the BRAS opcode.....Makes it easier to remember...... |
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dbzTHEdinosauer
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| thx for the info CICS Guy. |
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dick scherrer
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Hello,
| Quote: |
| Please help me understanding difference between Jump and Branch instruction....like JNE & BNE |
Once upon a time (on a different IBM computer), a big difference between a Jump and a Branch was instruction length and range of operation. A Jump was 2-bytes and could only move +/- 256 bytes from the current address (IIRC). A Branch was 4-bytes and had no such limitation. |
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CICS Guy
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| Yes, my first assembler, on an 1130.....grin...... |
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sheersh
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| I also read in some manual (+/- 256 one). I was looking for HLASM, so i guess first answer by CICS guy holds more appropriate.....Thankyou all for your reponces. |
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CICS Guy
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FWIW (IIRC), the I2 is an half word (two byte) count of the number of half words to be added to the current PSW address......
I don't recall seeing a sign bit to alter it to +/-......But I'll check it out.... |
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CICS Guy
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I stand corrected:
| z/Architecture Principles of Operation wrote: |
| The contents of the I2 field are a signed binary integer specifying the number of halfwords that is added to the address of the instruction to generate the branch address. |
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