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NI AND IMMEDIATE instruction


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mmezzeld

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Joined: 28 Jan 2010
Posts: 2
Location: DC

PostPosted: Tue Nov 26, 2024 2:44 am
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HOW DOES IT WORK ?
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Garry Carroll

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Joined: 08 May 2006
Posts: 1205
Location: Dublin, Ireland

PostPosted: Tue Nov 26, 2024 1:26 pm
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The second operand is ANDed with bits of the first
operand, and the result replaces those bits of the
first operand. The remainder of the first operand
remains unchanged.

from the Z/OS Principles of Operation : www.ibm.com/support/pages/sites/default/files/inline-files/SA22-7832-00.pdf

Garry.
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sergeyken

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Joined: 29 Apr 2008
Posts: 2133
Location: USA

PostPosted: Tue Nov 26, 2024 7:28 pm
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There are many versions of And-Immediate instruction.

Code:
NI   D1(B1),I2 [SI]
NIY  D1(B1),I2 [SIY]
NC   D1(L,B1),D2(B2) [SS-a]


For N, NC, NG, NGR, NI, NIY, NR, and NY, the AND of the first and second operands is placed at the first operand location. For NGRK and NRK, the AND of the second and third operands is placed at the first operand
location.

The connective AND is applied to the operands bit by bit. The contents of a bit position in the result are set to one if the corresponding bit positions in both operands contain ones; otherwise, the result bit is set to zero.

For AND (NC), each operand is processed left to right. When the operands overlap, the result is obtained as if the operands were processed one byte
at a time and each result byte were stored immediately after fetching the necessary operand bytes.

For AND (NI, NIY), the first operand is one byte in length, and only one byte is stored. When the interlocked-access facility 2 is installed, the update of the
first operand appears to be an interlocked-update reference as observed by other CPUs and channel programs, and a specific-operand-serialization operation is performed.

For AND (N, NR, NRK, and NY), the operands are 32 bits, and for AND (NG, NGR, and NGRK), they are 64 bits.

The displacements for N, NI, and both operands of NC are treated as 12-bit unsigned binary integers.

The displacement for NY, NIY, and NG is treated as a 20-bit signed binary integer.

Resulting Condition Code:
0 Result zero
1 Result not zero
2 --
3 --


Code:
NIHF  R1,I2 [RIL-a]
NIHH  R1,I2 [RI-a]
NIHL  R1,I2 [RI-a]
NILF  R1,I2 [RIL-a]
NILH  R1,I2 [RI-a]
NILL  R1,I2 [RI-a]


The second operand is ANDed with bits of the first operand, and the result replaces those bits of the first operand. The remainder of the first operand remains unchanged.

For each instruction, the bits of the first operand that are ANDed with the second operand and then replaced are as follows:

Code:
Instruction  Bits ANDed
             and Replaced
NIHF          0-31
NIHH          0-15
NIHL         16-31
NILF         32-63
NILH         32-47
NILL         48-63


The connective AND is applied to the operands bit by bit. The contents of a bit position in the result are set to one if the corresponding bit positions in both operands contain ones; otherwise, the result bit is set to
zero.

Resulting Condition Code:
0 Result is zero
1 Result is not zero
2 --
3 --
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