Hi,
Please give me the ans of the following:
1. What is the difference in BAL & BALR instruction.
2. What is the difference between BAL & BAS instruction.
3. What are the maxm range of DATA we can move with MVCL instruction.
Thanks
Subhasis
>> 1. What is the difference in BAL & BALR instruction.
>> 2. What is the difference between BAL & BAS instruction.
Please refer to the IBM processor book "Principle of Operations"
Code:
*
* BAL Rx,D(X,B) Branch and Link
* BALR Rx,Ry Branch and Link Register
* - Register Rx has:
* -- leftmost 8 bits does have condition code and program mask bits from PSW loaded
* -- 24 bit addressing,
* -- Rx has return address (which is next instruction)
* -- BAL - 2nd operand is the subrutnA address within code segment
* -- BALR - 2nd register operand has address of subrutnA
*
* BAS Rx,D(X,B) Branch and Save (same as BAL, except below)
* BASR Rx,Ry Branch and Save Register (same as BALR, except below)
* - Register Rx has:
* -- leftmost 8 bits does NOT have condition code and program mask bits from PSW loaded
* -- virtually can have 32 bit addressing
* -- good for Extended addressing (XA) and branch to other segments
* -- Rx has return address (which is next instruction)
* -- BAS - 2nd operand is the subrutnB address (other segment)
* -- BASR - 2nd register operand has address of subrutnB (other segment)
*
*---+----1----+----2----+----3----+----4
...
BAL Rx,subrutnA ; Rx has return address RtnHereA
RtnHereA DS 0h
...
LA Ry,subrutnA ; Load Address of subrutnA into Register Ry
BALR Rx,Ry ; Rx has return address RtnHereB
RtnHereB DS 0h
...
*
*
subrutnA ST Rx,RxSave ; Save return address - Register Rx
...
BR Rx
RxSave DS F
*
*
*
subrutnB DS 0h ; other code segment
ST Rx,RxSaveB ; Save return address - Register Rx
...
BR Rx
RxSaveB DS F
*
*
...
*
>> 3. What are the maxm range of DATA we can move with MVCL instruction.
Code:
*
* MVCL RXeo,RYeo ; Move Char long
* RXeo - Registers even/odd pair -- move to
* RYeo - Registers even/odd pair -- move from
* even registers - address of from and to
* odd registers - length of each operand
* max data length 16,777,215
*
The next sequential address is placed in operand-1 (r1) as linkage information, a branch to operand-2 (x2+b2+d2) is performed.
Suppose
x=index
b=base register
ddd=displacement
then
45 RX BDDD
r=register
R1,D2(X2,B2)
This instruction was originally intended for use with 24-bit addressing and is still provided for back-level compatibility. Only the rightmost 24 bits (bits 8-31) of the full word are used when branching or linking. The first 8 bits (bits 0-7) are not used as part of the address. Note: This instruction will work with 31-bit addressing mode but it is recommended that the BAS instruction be used instead of the BAL instruction.
BALR, Branch and Link Register
The next sequential address is placed in operand-1 as linkage information, a branch to operand-2 is performed.
This instruction was originally intended for use with 24-bit addressing and is still provided for back-level compatibility. Only the rightmost 24 bits (bits 8-31) of the full word are used when branching or linking. The first 8 bits (bits 0-7) are not used as part of the address.Note: This instruction will work with 31-bit addressing mode but it is recommended that the BASR instruction be used instead of the BALR instruction.
