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Assembler test under mask question


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jackzhang75

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Joined: 09 Jun 2014
Posts: 124
Location: CT

PostPosted: Tue Apr 06, 2021 6:55 am
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Hi experts,

I am looking at the following assembler and i am not sure how exactly the TM instruction is working.


Code:
           L     R2,0(R1)                GET A(ABEND CODE)     
           LH    R1,0(R2)               GET ABEND CODE       
           TM    0(R2),X'F0'           GOOD CODE             
           BZ    ABEND                  YES                   
           LA    R1,4095                ELSE SET DEFAULT     
  ABEND    ABEND  (R1),DUMP                                   
  *        SYMBOLIC REGS,R10=YES                             
           YREGS   


I see the content in register
Code:
R2  ==> 800B719E
and
Code:
R1  ==> 00000000


So for the mask 'F0' --> 11110000 , is it looking for R2 --> 800B?
When i ran the program , the control BZ is go to ABEND which i think R2 should be all zero? but i don't see R2 is all zero so i am confusing..which part of R2 the mask is used on?

Thanks
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steve-myers

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PostPosted: Tue Apr 06, 2021 8:46 am
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Reg 2 is the address of the data to test. It is not the data to test. The data to test is at B719E.
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sergeyken
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Joined: 29 Apr 2008
Posts: 1201

PostPosted: Tue Apr 06, 2021 5:49 pm
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The data to “test under mask” is one single byte addressed by R2, with zero offset from R2 value.

The (uncommented) logic looks like:
- get ABEND code from a halfword addresses by R2 into R1
- verify that the code at location R2 is less or equal to X’0FFF’ = 4095
- if not like this, then replace it in R1 with 4095

For clarity the better way would be
Code:
 LH R1,0(R2)
 CHI R1,4095
 JLE *+8
 LHI R1,4095
 ABEND ...
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steve-myers

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PostPosted: Tue Apr 06, 2021 7:37 pm
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The instruction is testing the first 4 bits of the nominal ABEND code. If any bits are on the code is invalid and valid user ABEND code is loaded into reg 1.

Sergeyken's code does not do this. Consider the case when the high order bit is on. For example X'FFFF'. The LH sets reg 1 to X'FFFFFFFF' What's going to happen with the CHI/JLE?
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sergeyken
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PostPosted: Tue Apr 06, 2021 7:46 pm
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steve-myers wrote:
The instruction is testing the first 4 bits of the nominal ABEND code. If any bits are on the code is invalid and valid user ABEND code is loaded into reg 1.

Sergeyken's code does not do this. Consider the case when the high order bit is on. For example X'FFFF'. The LH sets reg 1 to X'FFFFFFFF' What's going to happen with the CHI/JLE?

Agreed.
Better to use
CL R1,=F’4095’
JLE *+8
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jackzhang75

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Joined: 09 Jun 2014
Posts: 124
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PostPosted: Tue Apr 06, 2021 7:59 pm
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Thank you for your replay. now i understand.
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