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TM(Test Under Mask) instruction in assembler
IBM Mainframe Forums -> PL/I & Assembler
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vinayknj

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Joined: 26 May 2008
Posts: 50
Location: Bangalore
PostPosted: Mon May 09, 2011 6:07 pm
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Hi,

Can anyone explain me the functionality of Test under Mask instruction in assembler? Thanks
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PeterHolland

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Joined: 27 Oct 2009
Posts: 2481
Location: Netherlands, Amstelveen
PostPosted: Mon May 09, 2011 6:31 pm
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Next manual explains it all :


z/Architecture Principles of Operation SA22-7832-02
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Bill O'Boyle

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Joined: 14 Jan 2008
Posts: 2501
Location: Atlanta, Georgia, USA
PostPosted: Mon May 09, 2011 6:49 pm
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If "POPS" is too intimidating -

www.simotime.com/sim4dzip.htm#AsmInstructionSet

and download/unzip the Assembler Instruction Set.

Although certainly not as inclusive as "POPS", it will give you what you're looking for.

Bill
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