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TMLH Instruction in assembler

 
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Harsh Pawar

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Joined: 04 Jun 2008
Posts: 25
Location: Noida

PostPosted: Tue Dec 22, 2009 5:05 pm    Post subject: TMLH Instruction in assembler
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I am not able to figure out what is TMLH instruction.
I know translate under mask (TM) and i know LH (Load Halfword).

Thanks for helping. icon_idea.gif

Regards,
Harry
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enrico-sorichetti

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Joined: 14 Mar 2007
Posts: 10231
Location: italy

PostPosted: Tue Dec 22, 2009 5:13 pm    Post subject: Reply to: TMLH Instruction in assembler
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the TMLH instruction does not exist...
see the
Enterprise Systems Architecture/390 IBM Principles of Operation
SA22-7201-08

chapter 7/page 130 for the different flavors of the TM instruction

You could have found that Yourself with very little effort...
look at the manual, search for the TMLH instruction, get no hits, search for the TML and the TMH instruction


to be succesfull in IT a bit ( better a few bytes ) of ingenuity does help

edited after peter reply to correct a brain check
as a partial excuse I keep all ( well-.. most of ) the versions of the relevant principles of operations manuals, and I clicked on the wrong one

this one ... has the right info
z/Architecture IBM Principles of Operation
SA22-7832-07
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PeterHolland

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Joined: 27 Oct 2009
Posts: 2429
Location: Netherlands, Amstelveen

PostPosted: Tue Dec 22, 2009 5:21 pm    Post subject:
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TMLH and TMLL are new mnemonics for, the
ESA/390 instructions TEST UNDER MASK HIGH
(TMH) and TEST UNDER MASK LOW (TML),
respectively.

Found this in SA22-7832 z/Architecture Principles of Operation
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Harsh Pawar

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Joined: 04 Jun 2008
Posts: 25
Location: Noida

PostPosted: Tue Dec 22, 2009 6:52 pm    Post subject:
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Thanks enrico and Peter that helped.

Summary for other users who are searching TMLH :

It is a RI type instruction ( New flavour of TM) where immediate data is of 2 bytes.

example:

TMLH R05,X'FFFF'

This will check 32-47 bits ( 2 bytes starting from 32nd bit of register 05) with mask of all 1.

Regards,
Harry
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