Portal | Manuals | References | Downloads | Info | Programs | JCLs | Master the Mainframes
IBM Mainframe Computers Forums Index
 
Register
 
IBM Mainframe Computers Forums Index Mainframe: Search IBM Mainframe Forum: FAQ Memberlist Usergroups Profile Log in to check your private messages Log in
 

 

Some queries regarding BAL instruction

 
Post new topic   Reply to topic    IBMMAINFRAMES.com Support Forums -> PL/I & Assembler
View previous topic :: :: View next topic  
Author Message
subhasis_50

Moderator


Joined: 09 Mar 2005
Posts: 363
Location: Earth

PostPosted: Tue May 17, 2005 12:30 pm    Post subject: Some queries regarding BAL instruction
Reply with quote

Hi,
Please give me the ans of the following:
1. What is the difference in BAL & BALR instruction.
2. What is the difference between BAL & BAS instruction.
3. What are the maxm range of DATA we can move with MVCL instruction.
Thanks
Subhasis
Back to top
View user's profile Send private message

grepusr3

New User


Joined: 10 May 2005
Posts: 29

PostPosted: Wed May 18, 2005 6:13 am    Post subject: Re: Some queries regarding BAL instruction
Reply with quote

See if this helps
http://ibmmainframes.com/viewtopic.php?t=2744
and from my understanding of it, as below.


>> 1. What is the difference in BAL & BALR instruction.
>> 2. What is the difference between BAL & BAS instruction.

Please refer to the IBM processor book "Principle of Operations"
Code:
*
* BAL   Rx,D(X,B)   Branch and Link
* BALR  Rx,Ry       Branch and Link Register
*     - Register Rx has:
*       -- leftmost 8 bits does have condition code and program mask bits from PSW loaded
*       -- 24 bit addressing,
*       -- Rx has return address (which is next instruction)
*       -- BAL - 2nd operand is the subrutnA address within code segment
*       -- BALR - 2nd register operand has address of subrutnA
*
* BAS   Rx,D(X,B)   Branch and Save  (same as BAL, except below)
* BASR  Rx,Ry       Branch and Save Register  (same as BALR, except below)
*     - Register Rx has:
*       -- leftmost 8 bits does NOT have condition code and program mask bits from PSW loaded
*       -- virtually can have 32 bit addressing
*       -- good for Extended addressing (XA) and branch to other segments
*       -- Rx has return address (which is next instruction)
*       -- BAS - 2nd operand is the subrutnB address (other segment)
*       -- BASR - 2nd register operand has address of subrutnB (other segment)
*       
*---+----1----+----2----+----3----+----4
         ...
         BAL   Rx,subrutnA             ; Rx has return address RtnHereA
RtnHereA DS    0h
         ...
         LA    Ry,subrutnA             ; Load Address of subrutnA into Register Ry
         BALR  Rx,Ry                   ; Rx has return address RtnHereB
RtnHereB DS    0h
         ...
*
*
subrutnA ST    Rx,RxSave               ; Save return address - Register Rx
         ...
         BR    Rx
RxSave   DS    F
*   
*
*
subrutnB DS    0h                      ; other code segment
         ST    Rx,RxSaveB               ; Save return address - Register Rx
         ...
         BR    Rx
RxSaveB  DS    F
*
*   
         ...
*                 

>> 3. What are the maxm range of DATA we can move with MVCL instruction.

Code:
*
*        MVCL  RXeo,RYeo                ; Move Char long
*               RXeo - Registers even/odd pair -- move to
*               RYeo - Registers even/odd pair -- move from
*               even registers - address of from and to
*               odd registers - length of each operand
*               max data length 16,777,215
*               

-Pelad
Back to top
View user's profile Send private message
Gaurav.Virmani

New User


Joined: 23 Jun 2005
Posts: 3

PostPosted: Wed Jun 29, 2005 12:41 pm    Post subject:
Reply with quote

BAL, Branch and Link

The next sequential address is placed in operand-1 (r1) as linkage information, a branch to operand-2 (x2+b2+d2) is performed.

Suppose

x=index
b=base register
ddd=displacement

then

45 RX BDDD

r=register



R1,D2(X2,B2)

This instruction was originally intended for use with 24-bit addressing and is still provided for back-level compatibility. Only the rightmost 24 bits (bits 8-31) of the full word are used when branching or linking. The first 8 bits (bits 0-7) are not used as part of the address. Note: This instruction will work with 31-bit addressing mode but it is recommended that the BAS instruction be used instead of the BAL instruction.





BALR, Branch and Link Register
The next sequential address is placed in operand-1 as linkage information, a branch to operand-2 is performed.



This instruction was originally intended for use with 24-bit addressing and is still provided for back-level compatibility. Only the rightmost 24 bits (bits 8-31) of the full word are used when branching or linking. The first 8 bits (bits 0-7) are not used as part of the address.Note: This instruction will work with 31-bit addressing mode but it is recommended that the BASR instruction be used instead of the BALR instruction.


For any further queries u can visit the following link:
http://www.simotime.com/asmins01.htm#BAL
Back to top
View user's profile Send private message
Gerald Kaiser

New User


Joined: 29 Jun 2005
Posts: 2

PostPosted: Wed Jun 29, 2005 3:22 pm    Post subject:
Reply with quote

[quote="Gaurav.Virmani"]BAL, Branch and Link
Just to clarify. In 31-bit address mode the addresses are generated using the 31-bit values.
Back to top
View user's profile Send private message
View previous topic :: :: View next topic  
Post new topic   Reply to topic    IBMMAINFRAMES.com Support Forums -> PL/I & Assembler All times are GMT + 6 Hours
Page 1 of 1

 

Search our Forum:

Similar Topics
Topic Author Forum Replies Posted
No new posts Running queries against OLTP Database A_programmers DB2 3 Tue Jul 14, 2015 4:51 pm
No new posts Selective execution of a queries Delip DB2 9 Fri Jan 16, 2015 3:51 pm
No new posts Re-write queries to minimize the effe... Anil Khanna DB2 6 Mon Aug 04, 2014 1:49 pm
No new posts Interpret instruction not working in ... spoorni CLIST & REXX 2 Fri Feb 07, 2014 10:22 pm
No new posts Running multiple queries in a PS file... nikhil_bansal04 JCL & VSAM 12 Wed Dec 18, 2013 12:06 pm


Facebook
Back to Top
 
Mainframe Wiki | Forum Rules | Bookmarks | Subscriptions | FAQ | Tutorials | Contact Us